TDC1 Time to Digital Converter

The TDC1 is a combined moderate-speed counter and timestamping/timetagging device for processing electrical pulses in four independent inputs. It can accept a wide range of standardized signal standards including (NIM and TTL) and is completely powered from a USB2 connection. The internal clock source can be disciplined by an external 10 MHz timing reference for precise absolute timing.

In counting mode, the device has 4 independent counters registering events on each of the four inputs, and 4 counting coincidence events between 4 pairs of inputs that register counts for a selectable integration time from 1ms to 65s.

In timetag mode, the device registers the absolute time of the leading edge every signal event (pulse) at any of the input lines with a resolution of 2ns together with the logical state of all four input lines. This allows to identify complex detector patterns with a single device.

The TDC1 is bundled with open source scripts in Python and C to perform data collection and visualize real time counts and coincidences.

Price indicated is valid only for Europe, US, UAE, China, Taiwan, Korea, Turkey, Australia and South-East Asia. 

User Wiki hosted on Github

Software Repository hosted on Github

Python Package for S-Fifteen Devices

GUI Repository hosted on Github *new 2022*

Datasheet PDF Format

  • Physical Parameters:

    Size approx 85mm x 46mm x 22mm
    Weight 150g
    Power consumption

    <0.5W (100mA from USB bus)

     

    Signal Inputs:

    Impedance 50Ohm (default) and 1kOhm (selectable by jumpers)
    Input standards TTL, NIM, custom (positive or negative pulses with a trigger
    level between -3.3V and +3.3V)
    Absolute Maximum Input Amplitude +4.2V/-4.2V
    Minimal pulse width 2ns
    Minimal pulse separation 2ns
    Connector LEMO00 size coaxial connector (optional: SMA)

     

    Clock reference:

    External reference frequency 10MHz nominal (accepts 9...11MHz)
    External reference amplitude 100mVpp min, 2.3Vpp max

    Clock selection
    automatic or forced manual

    Internal clock accuracy
    <50ppm, temperature drift TBD

     

    Counter mode parameters:

    Maximal count rate 80MHz in each channel
    Integration time 1ms to 65535ms in steps of 1ms
    Pairwise Coincidences Ch1-Ch3/Ch1-Ch4/Ch2-Ch3/Ch2-Ch4

     

    Timestamp mode parameters:

    Timing resolution 2ns
    Timing jitter <200ps (nominal)
    Maximal counting rate <13Mevents/s average, <250 Mevents/s in bursts of <256
    events (see detail specification)
    Dead time between events None

     

    Interface:

    Host connection USB CDC ACM class / virtual com port (no device driver necessary)

    Data format
    Text or binary

     

    Software:

    Windows, Mac, Linux Labview .vi and Python scripts hosted at Github (MIT Licence)

     

  • Frequently Asked Questions:

    Question 1: No signal detected

    Check that the trigger level is set appropriately.

    Question 2: I don't see the device in my computer

    Ensure that the USB port is able to supply enough current for the device. Plug directly to the host to check.

    Question 3: What is the coincidence window in PAIRS mode?

    In PAIRS mode, a coincidence is counted when both input channels are high within a time step of 2ns (Even when the edges of the two pulses occur in different time step. Thus the effective coincidence window is the sum of both pulse widths.

    Question 4: I keep getting wrong timestamps at <2MHz rates using a Windows machine

    There is an issue with the latest Windows (>8) serial driver that has a lower throughput compared to older (<7) versions causing data to be corrupted in transit from the TDC1 to the host. A workaround that checks for corrupted data at high count rate is implemented in pyS15